Patman̲āpan̲, Ṭ.R.

Design through Verilog HDL / T.R. Padmanabhan, B. Bala Tripura Sundari. - Wiley Student edition. - New Delhi : Wiley India, c2004. - xii, 455 p. : ill. ; 25 cm.

Includes bibliographical references (p. 449-450) and index.

9788126519316

2003057671


Engineering
Verilog (Computer hardware description language)

TK7885.7 / .P37 2004

621.392 / PAD